Pseudonymous maker “Portland.HODL” has created a mechanical keyboard designed for absolutely the lowest attainable enter latency — by utilizing a field-programmable gate array (FPGA) and “overkill” microcontroller.

“The aim of Nyan Keys was to engineer the bottom attainable latency mechanical keyboard that will settle for any Cherry appropriate switches, e.g. Kailh and Gateron,” Portland.HODL explains of the keyboard’s design. “The {hardware} inspiration got here from the Wooting 60HE and Pok3r 60% mechanical keyboards. The place the efficiency traits of the Wooting have been desired however with the liberty to make use of any off the shelf switches of the Pok3r.”

In a typical mechanical keyboard design, a single comparatively low-resource microcontroller is used as an interface between the bodily switches and the USB host. There is a microcontroller within the Nyan Keys keyboard — named for the well-known Nyan Cat animation — nevertheless it’s somewhat extra highly effective than you’d count on: an STMicro STM32F723, providing USB 2.0 high-speed connectivity for polling charges as much as 8,000Hz.

That is perhaps sufficient for some, however Portland.HODL wasn’t but glad — so the keyboard features a Lattice Semi iCE20HX 3k FPGA. “Utilizing an FPGA had the benefit of having the ability to wire every swap to its personal IO pin [and] to present every key (swap) its personal core, which consists of an eight-bit timer. The timer is at all times counting as much as the worth of 255, as soon as the counter reaches the comparability worth the important thing can change its state and the timer will reset to 0. Whereas the counter is any worth that’s not 255 the swap state cannot be modified. That is the debounce mechanism.”

With a devoted core per key, plus the high-performance microcontroller, Nyan Keys delivers absolutely the lowest latency between key-press and motion — however there’s loads of sources left within the FPGA for extra. In consequence, Portland.HODL added a very uncommon characteristic for a keyboard: a real-time working system (RTOS) dubbed NyanOS which incorporates an FPGA-accelerated Bitcoin miner — a likely-divisive characteristic which, the maker says, is elective and off-by-default.

“[The] Nyan GUI [Graphical User Interface] additionally has a JavaScript primarily based occasion of a Xterm terminal that allows the consumer to start out inputting their very own instructions to hack the cat,” Portland.HODL provides. “A number of options I’ve proper now are getting efficiency stats, setting the proprietor’s identify, getting construct data, writing a bitstream, and assist.”

Full particulars on the mission can be found on Hackaday.io, whereas Portland.HODL has launched {hardware} and software program sources on GitHub underneath the permissive MIT license and Apache 2.0 license respectively; there’s, nonetheless, no board file.

“I wish to promote the boards that [I] designed and don’t need different industrial entities with a low barrier to entry do the identical,” the maker explains — whereas saying events can ship an e-mail expressing curiosity in a .BRD file for private use.